Remembering Information
All of the logic seen so far in this text has produced outputs based entirely on the values present at its inputs -- i.e., it has all be combinational logic. However, consider something as seemingly simple as a basic calculator. You have seen how numerical information can be represented in hardware, and you have seen building blocks like adder/subtractors, but a calculator behaves fundamentally differently from anything you have seen so far -- you can press a button, then press another button, then press another button... and the calculator's behavior depends not just on which button is being pressed, but on the sequence of button presses. There is no way to accomplish this with the tools you have so far, because that behavior depends on information from the past (e.g., which buttons have been pressed and in which order), and that requires the ability to remember.
Latches
The simplest form of memory in digital systems is a latch. A latch is a circuit that can hold one bit of data (0 or 1), and can hold that data until it is explicitly changed.
Consider this circuit:
If you created a truth table for this circuit, some parts of the truth table would be easy:
| S | R | Q |
|---|---|---|
| 1 | X | 1 |
| 0 | 1 | 0 |
... but what about when both S and R are low? In that case, Q=0+0+Q, which can be algebraically simplified to Q=Q. That means that, with both inputs low, if Q is 0 then it remains 0, and if it's 1 then it remains 1. The circuit holds that bit of information -- it remembers it. You can make the output be 0 or 1 using the inputs, but you can also let the circuit latch the previous value.
The typical symbol for an SR latch is:
While the SR latch is useful and simple to create, it is awkward to use because of the separate "set" and "reset" functionality needed to control the output value. To solve this problem, the D latch (Data latch) is often preferred. The D latch has a single data input (D) and a control signal commonly called the Enable.
The D latch operates as follows:
- When the Enable (E) input is high, the Q output follows the D input. If D is 1, Q is set to 1; if D is 0, Q is set to 0.
- When the Enable (E) input is low, the latch retains its previous value, just like an SR latch when both inputs are 0.
| En | D | Q |
|---|---|---|
| 0 | 0 | Q |
| 0 | 1 | Q |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Problems with Latches While D latches are simple and effective for storing a bit of information, they come with a significant issue related to transparency. D latches are "transparent" while their control signal is active, meaning changes to the D input propagate directly to the output. This can lead to unintended behavior if the value at D is affected by Q (i.e., if the latch is used in a system with feedback).
A device that enables storage but fixes the issues caused by transparency is the flip-flop. Flip-flops are edge-triggered devices -- that means that they capture the input value only at specific moments (typically on a rising edge of one of their inputs) and hold that value until the next triggering event. The event-sensitive input that triggers data capture is usually named the clock input.
The D Flip-Flop
The most common type of flip-flop is the D Flip-Flop. The D Flip-Flop has two primary inputs:
- D: The input that provides the value to be stored.
- Clock: A signal that controls when the data is captured.
The fundamental behavior of a D Flip-Flop is:
- On the rising edge of the clock signal, the value at the D input is sampled and stored.
- Until the next clock edge, the output (Q) remains unchanged regardless of changes to the D input.
That behavior can be summarized with this function table:
| Clock | D | Q |
|---|---|---|
| ↑ | 0 | 0 |
| ↑ | 1 | 1 |
| 0 | X | Q |
| 1 | X | Q |
Here, "↑" represents a rising edge of the clock. Notice that the Q output only changes at the clock edge, even if D changes in between.
Because the clock input has unique behavior, it often gets a unique representation on the schematic symbol:
